Experiment 3 (Concurrent Code and Symbol Interfacing)

I. Introduction:

                In this experiment our group creates the modules of the comparator and the multiplexer. The multiplexer codes are insert to the modules of 9 mod9 is the combinational circuits the comparator become the single working module that the program will run on it. The combination of the comparator and multiplexer codes.

II. Objective:

                To be able to implement combinational logic circuits with concurrent codes and interface their symbols with each other.

III. Conceptual Framework:

IV. Data and Results:

Multiplexer 3.1

library ieee;

use ieee.std_logic_1164.all;

use ieee.std_logic_arith.all;

entity mnm31 is

port (S : bit;

A,B : in bit_vector (0 to 3);

X : out bit_vector(0 to 3));

end mnm31;

architecture mux_Threep1 of mnm31 is

begin

process (S)

begin

case S is

when '0' => X<= A;

when '1' => X<= B;

end case;

end process;

end mux_Threep1;

Multiplexer 3.2

library ieee;

use ieee.std_logic_1164.all;

entity mnm32 is

port (A,B : in bit_vector (3 downto 0);

O : out bit);

end entity;

architecture comp of mnm32 is

begin

process (A,B)

begin

if (A(3) = '1' AND B(3) = '0') then O <='1';

elsif (A(2) = '1' AND B(2) = '0') then O <='1';

elsif (A(1) = '1' AND B(1) = '0') then O <='1';

elsif (A(0) = '1' AND B(0) = '0') then O <='1';

else

O <= '0';

end if;

end process;

end comp;

Results: 

Combinational of Multiplexer

V. Analysis:

                Our groups analyze and discuss how the comparator and multiplexer combine and the output is how the module reacts in two different inputs.

VI. Conclusion:

                We learned that the comparator and multiplexer combine to each other and we understand  the flow of the data in the comparator in and out and last the group is easily get the output of the experiment easily.